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<div class="title">Flags<div class="ingroups"><a class="el" href="group__DenseMatrixManipulation__chapter.html">Dense matrix and array manipulation</a> &raquo; <a class="el" href="group__DenseMatrixManipulation__Reference.html">Reference</a> &raquo; <a class="el" href="group__Core__Module.html">Core module</a></div></div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<p>These are the possible bits which can be OR'ed to constitute the flags of a matrix or expression.</p>
<p>It is important to note that these flags are a purely compile-time notion. They are a compile-time property of an expression type, implemented as enum's. They are not stored in memory at runtime, and they do not incur any runtime overhead.</p>
<dl class="section see"><dt>See also</dt><dd><a class="el" href="classEigen_1_1DenseBase.html#a277fac61f255b4438689daa78aa2028ea7392c9b2ad41ba3c16fdc5306c04d581">MatrixBase::Flags</a> </dd></dl>
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Variables</h2></td></tr>
<tr class="memitem:ga020f88dc24a123b9afbd756c4b220db2"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#ga020f88dc24a123b9afbd756c4b220db2">Eigen::ActualPacketAccessBit</a></td></tr>
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<tr class="memitem:gac5795adacd266512a26890973503ed88"><td class="memItemLeft" align="right" valign="top">EIGEN_DEPRECATED const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#gac5795adacd266512a26890973503ed88">Eigen::AlignedBit</a></td></tr>
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<tr class="memitem:gaed0244284da47a2b8661261431173caf"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#gaed0244284da47a2b8661261431173caf">Eigen::CompressedAccessBit</a></td></tr>
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<tr class="memitem:gabf1e9d0516a933445a4c307ad8f14915"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#gabf1e9d0516a933445a4c307ad8f14915">Eigen::DirectAccessBit</a></td></tr>
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<tr class="memitem:ga0972b20dc004d13984e642b3bd12532e"><td class="memItemLeft" align="right" valign="top">EIGEN_DEPRECATED const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#ga0972b20dc004d13984e642b3bd12532e">Eigen::EvalBeforeAssigningBit</a></td></tr>
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<tr class="memitem:gaa34e83bae46a8eeae4e69ebe3aaecbed"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#gaa34e83bae46a8eeae4e69ebe3aaecbed">Eigen::EvalBeforeNestingBit</a></td></tr>
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<tr class="memitem:ga4b983a15d57cd55806df618ac544d09e"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#ga4b983a15d57cd55806df618ac544d09e">Eigen::LinearAccessBit</a></td></tr>
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<tr class="memitem:gae2c323957f20dfdc6cb8f44428eaec1a"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#gae2c323957f20dfdc6cb8f44428eaec1a">Eigen::LvalueBit</a></td></tr>
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<tr class="memitem:ga3c186ad80ddcf5e2ed3d7ee31cca1860"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#ga3c186ad80ddcf5e2ed3d7ee31cca1860">Eigen::NoPreferredStorageOrderBit</a></td></tr>
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<tr class="memitem:ga1a306a438e1ab074e8be59512e887b9f"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#ga1a306a438e1ab074e8be59512e887b9f">Eigen::PacketAccessBit</a></td></tr>
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<tr class="memitem:gae4f56c2a60bbe4bd2e44c5b19cbe8762"><td class="memItemLeft" align="right" valign="top">const unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__flags.html#gae4f56c2a60bbe4bd2e44c5b19cbe8762">Eigen::RowMajorBit</a></td></tr>
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<h2 class="groupheader">Variable Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ga020f88dc24a123b9afbd756c4b220db2">&#9670;&nbsp;</a></span>ActualPacketAccessBit</h2>

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<p>If vectorization is enabled (EIGEN_VECTORIZE is defined) this constant is set to the value <em>PacketAccessBit</em>.</p>
<p>If vectorization is not enabled (EIGEN_VECTORIZE is not defined) this constant is set to the value 0. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gac5795adacd266512a26890973503ed88">&#9670;&nbsp;</a></span>AlignedBit</h2>

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<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000009">Deprecated:</a></b></dt><dd></dd></dl>
<p>means the first coefficient packet is guaranteed to be aligned. An expression cannot have the AlignedBit without the PacketAccessBit flag. In other words, this means we are allow to perform an aligned packet access to the first element regardless of the expression kind: </p><div class="fragment"><div class="line">expression.packet&lt;<a class="code" href="group__enums.html#gga45fe06e29902b7a2773de05ba27b47a1ae12d0f8f869c40c76128260af2242bc8">Aligned</a>&gt;(0);</div>
<div class="ttc" id="agroup__enums_html_gga45fe06e29902b7a2773de05ba27b47a1ae12d0f8f869c40c76128260af2242bc8"><div class="ttname"><a href="group__enums.html#gga45fe06e29902b7a2773de05ba27b47a1ae12d0f8f869c40c76128260af2242bc8">Eigen::Aligned</a></div><div class="ttdeci">@ Aligned</div><div class="ttdef"><b>Definition:</b> Constants.h:242</div></div>
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<h2 class="memtitle"><span class="permalink"><a href="#gaed0244284da47a2b8661261431173caf">&#9670;&nbsp;</a></span>CompressedAccessBit</h2>

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<p>Means that the underlying coefficients can be accessed through pointers to the sparse (un)compressed storage format, that is, the expression provides: </p><div class="fragment"><div class="line"><span class="keyword">inline</span> <span class="keyword">const</span> Scalar* valuePtr() <span class="keyword">const</span>;</div>
<div class="line"><span class="keyword">inline</span> <span class="keyword">const</span> <a class="code" href="namespaceEigen.html#a62e77e0933482dafde8fe197d9a2cfde">Index</a>* innerIndexPtr() <span class="keyword">const</span>;</div>
<div class="line"><span class="keyword">inline</span> <span class="keyword">const</span> <a class="code" href="namespaceEigen.html#a62e77e0933482dafde8fe197d9a2cfde">Index</a>* outerIndexPtr() <span class="keyword">const</span>;</div>
<div class="line"><span class="keyword">inline</span> <span class="keyword">const</span> <a class="code" href="namespaceEigen.html#a62e77e0933482dafde8fe197d9a2cfde">Index</a>* innerNonZeroPtr() <span class="keyword">const</span>;</div>
<div class="ttc" id="anamespaceEigen_html_a62e77e0933482dafde8fe197d9a2cfde"><div class="ttname"><a href="namespaceEigen.html#a62e77e0933482dafde8fe197d9a2cfde">Eigen::Index</a></div><div class="ttdeci">EIGEN_DEFAULT_DENSE_INDEX_TYPE Index</div><div class="ttdoc">The Index type as used for the API.</div><div class="ttdef"><b>Definition:</b> Meta.h:59</div></div>
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<h2 class="memtitle"><span class="permalink"><a href="#gabf1e9d0516a933445a4c307ad8f14915">&#9670;&nbsp;</a></span>DirectAccessBit</h2>

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<p>Means that the underlying array of coefficients can be directly accessed as a plain strided array. The memory layout of the array of coefficients must be exactly the natural one suggested by rows(), cols(), outerStride(), innerStride(), and the RowMajorBit. This rules out expressions such as <a class="el" href="classEigen_1_1Diagonal.html" title="Expression of a diagonal/subdiagonal/superdiagonal in a matrix.">Diagonal</a>, whose coefficients, though referencable, do not have such a regular memory layout.</p>
<p>See the comment on LvalueBit for an explanation of how LvalueBit and DirectAccessBit are mutually orthogonal. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga0972b20dc004d13984e642b3bd12532e">&#9670;&nbsp;</a></span>EvalBeforeAssigningBit</h2>

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<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000008">Deprecated:</a></b></dt><dd>means the expression should be evaluated before any assignment </dd></dl>

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<p>means the expression should be evaluated by the calling expression </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga4b983a15d57cd55806df618ac544d09e">&#9670;&nbsp;</a></span>LinearAccessBit</h2>

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<p>Short version: means the expression can be seen as 1D vector.</p>
<p>Long version: means that one can access the coefficients of this expression by coeff(int), and coeffRef(int) in the case of a lvalue expression. These index-based access methods are guaranteed to not have to do any runtime computation of a (row, col)-pair from the index, so that it is guaranteed that whenever it is available, index-based access is at least as fast as (row,col)-based access. Expressions for which that isn't possible don't have the LinearAccessBit.</p>
<p>If both PacketAccessBit and LinearAccessBit are set, then the packets of this expression can be accessed by packet(int), and writePacket(int) in the case of a lvalue expression.</p>
<p>Typically, all vector expressions have the LinearAccessBit, but there is one exception: <a class="el" href="classEigen_1_1Product.html" title="Expression of the product of two arbitrary matrices or vectors.">Product</a> expressions don't have it, because it would be troublesome for vectorization, even when the <a class="el" href="classEigen_1_1Product.html" title="Expression of the product of two arbitrary matrices or vectors.">Product</a> is a vector expression. Thus, vector <a class="el" href="classEigen_1_1Product.html" title="Expression of the product of two arbitrary matrices or vectors.">Product</a> expressions allow index-based coefficient access but not index-based packet access, so they don't have the LinearAccessBit. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gae2c323957f20dfdc6cb8f44428eaec1a">&#9670;&nbsp;</a></span>LvalueBit</h2>

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<p>Means the expression has a coeffRef() method, i.e. is writable as its individual coefficients are directly addressable. This rules out read-only expressions.</p>
<p>Note that DirectAccessBit and LvalueBit are mutually orthogonal, as there are examples of expression having one but note the other: </p><ul>
<li>writable expressions that don't have a very simple memory layout as a strided array, have LvalueBit but not DirectAccessBit </li>
<li>Map-to-const expressions, for example Map&lt;const Matrix&gt;, have DirectAccessBit but not LvalueBit</li>
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<p>Expressions having LvalueBit also have their coeff() method returning a const reference instead of returning a new value. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3c186ad80ddcf5e2ed3d7ee31cca1860">&#9670;&nbsp;</a></span>NoPreferredStorageOrderBit</h2>

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<p>for an expression, this means that the storage order can be either row-major or column-major. The precise choice will be decided at evaluation time or when combined with other expressions. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__flags.html#gae4f56c2a60bbe4bd2e44c5b19cbe8762">RowMajorBit</a>, <a class="el" href="group__TopicStorageOrders.html">Storage orders</a> </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga1a306a438e1ab074e8be59512e887b9f">&#9670;&nbsp;</a></span>PacketAccessBit</h2>

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<p>Short version: means the expression might be vectorized</p>
<p>Long version: means that the coefficients can be handled by packets and start at a memory location whose alignment meets the requirements of the present CPU architecture for optimized packet access. In the fixed-size case, there is the additional condition that it be possible to access all the coefficients by packets (this implies the requirement that the size be a multiple of 16 bytes, and that any nontrivial strides don't break the alignment). In the dynamic-size case, there is no such condition on the total size and strides, so it might not be possible to access all coeffs by packets.</p>
<dl class="section note"><dt>Note</dt><dd>This bit can be set regardless of whether vectorization is actually enabled. To check for actual vectorizability, see <em>ActualPacketAccessBit</em>. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gae4f56c2a60bbe4bd2e44c5b19cbe8762">&#9670;&nbsp;</a></span>RowMajorBit</h2>

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<p>for a matrix, this means that the storage order is row-major. If this bit is not set, the storage order is column-major. For an expression, this determines the storage order of the matrix created by evaluation of that expression. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__TopicStorageOrders.html">Storage orders</a> </dd></dl>

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